Informējam, ka Sistēma pielāgota darbam ar interneta pārlūkprogrammu Internet Explorer (8. un jaunākām versijām) un Mozilla Firefox (3.6 un jaunākām versijām).
Izmantojot citu interneta pārlūkprogrammu, brīdinām, ka Sistēmas funkcionalitāte var tikt traucēta.
This document establishes the general technological process, items and specific methods for verification and validation of semiconductor integrated circuits, which is intended for space application. These methods list in this document can be used to integrated circuits, including ASIC.
Reģistrācijas numurs (WIID)
93362
Darbības sfēra
This document establishes the general technological process, items and specific methods for verification and validation of semiconductor integrated circuits, which is intended for space application. These methods list in this document can be used to integrated circuits, including ASIC.
